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LT6554 650MHz Gain of 1 Triple Video Buffer
FEATURES

DESCRIPTIO
650MHz -3dB Small Signal Bandwidth 400MHz -3dB 2VP-P Large Signal Bandwidth 100MHz 0.1dB Bandwidth High Slew Rate: 2500V/s Fixed Gain of 1 Requires No External Resistors 90dB Channel Separation at 10MHz 60dB Channel Separation at 100MHz -82dBc 2nd Harmonic Distortion at 10MHz, 2VP-P -96dBc 3rd Harmonic Distortion at 10MHz, 2VP-P Low Supply Current: 8mA per Amplifier 6ns 0.1% Settling Time for 2V Step TTL Compatible Enable: ISS 100A When Disabled Differential Gain of 0.022%, Differential Phase of 0.006 Wide Supply Range: 2.25V (4.5V) to 6V (12V) Available in 16-Lead SSOP Package
The LT(R)6554 is a high-speed triple video buffer with an internally fixed gain of 1. The individual buffers are optimized for performance with a 1k load and feature a 2VP-P full signal bandwidth of 400MHz, making them ideal for driving very high-resolution video signals. Separate power supply pins for each amplifier boost channel separation to 90dB, allowing the LT6554 to excel in many highspeed applications. While the performance of the LT6554 is optimized for dual supply operation, it can also be used on a single supply as low as 4.5V. Using dual 5V supplies, each amplifier draws only 8mA. When disabled, the amplifiers draw less than 100A and the outputs become high impedance. Furthermore, the amplifiers are capable of turning on in less than 50ns, making them suitable for multiplexing and portable applications. The LT6554 is manufactured on Linear Technology's proprietary low voltage complementary bipolar process and is available in the 16-lead SSOP package that fits in the same PCB area as an SO-8 package.
, LTC and LT are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners.
APPLICATIO S

RGB Buffers A/D Drivers LCD Projectors
TYPICAL APPLICATIO
1 2 3 LT6554
Triple Video Buffer and A/D Driver
5V 16 15
Large Signal Transient Response
1.5 VOUT = 2VP-P VS = 5V 1.0 RL = 1k TA = 25C 0.5
-5V
RIN
+ - 480
14 1k
480 - GIN 5 6 + 480
OUTPUT (V)
4
13
0 -0.5 -1.0 -1.5
12 11 1k 5V
- BIN -5V 7 8 +
10 1k 9 -5V
6554 TA01b
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4 6 8 10 12 14 16 18 20 TIME (ns)
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LT6554
ABSOLUTE
(Note 1)
AXI U RATI GS
PACKAGE/ORDER I FOR ATIO
TOP VIEW EN DGND INR AGND ING AGND INB V- 1 2 3 4 5 6 7 8
G = +1 G = +1 G = +1
Total Supply Voltage (V+ to V-) ............................ 13.2V Input Current (Note 2) ........................................ 10mA Output Current (Continuous) ............................. 70mA EN to DGND Voltage (Note 2) ................................. 5.5V Output Short-Circuit Duration (Note 3) ............ Indefinite Operating Temperature Range (Note 4) ... -40C to 85C Specified Temperature Range (Note 5) .... -40C to 85C Storage Temperature Range .................. -65C to 150C Junction Temperature ........................................... 150C Lead Temperature (Soldering, 10 sec).................. 300C
16 V + 15 V + 14 OUTR 13 V - 12 OUTG 11 V + 10 OUTB 9 V-
ORDER PART NUMBER LT6554CGN LT6554IGN GN PART MARKING 6554 6554I
GN PACKAGE 16-LEAD PLASTIC SSOP TJMAX = 150C, JA = 135C/W
Consult LTC Marketing for parts specified with wider operating temperature ranges.
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 5V, RL = 1k, CL = 1.5pF, VEN = 0.4V, VAGND, VDGND = 0V.
SYMBOL VOS IIN en in RIN CIN PSRR IPSRR AV ERR AV MATCH VOUT IS PARAMETER Offset Voltage Input Current Output Noise Voltage Input Noise Current Input Resistance Input Capacitance Power Supply Rejection Ratio Input Current Power Supply Rejection Gain Error Gain Matching Maximum Output Voltage Swing Supply Current, Per Amplifier Supply Current, Disabled, Total IEN ISC SR -3dB BW 0.1dB BW Enable Pin Current Output Short-Circuit Current Slew Rate Small Signal -3dB Bandwidth Gain Flatness 0.1dB Bandwidth RL = RL = VEN = 4V VEN = Open VEN = 0.4V VEN = V+ RL = 0, VIN = 2V 4VP-P Output Step (Note 9) VOUT = 200mVP-P VOUT = 200mVP-P f = 100kHz f = 100kHz VIN = 1V f = 100kHz VS (Total) = 4.5V to 12V (Note 6) VS (Total) = 4.5V to 12V (Note 6) VOUT = 2V Any One Channel to Another

ELECTRICAL CHARACTERISTICS
CONDITIONS VIN = 0V, VOS = VOUT

MIN
TYP 11 -17 20 3.5
MAX 35 70 50
UNITS mV mV A nVHz pAHz k pF dB
150 51
400 1 65 1 5 0
A/V % % V
-2.5 3.75
-0.6 0.03 3.85 8 22 0.5
10 13 100 100 50
-200 50 1700
-95 0.5 105 2500 650 100
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mA mA A A A A mA V/s MHz MHz
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LT6554
The denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VS = 5V, RL = 1k, CL = 1.5pF, VEN = 0.4V, VAGND, VDGND = 0V.
SYMBOL LSBW PARAMETER Large Signal Bandwidth All-Hostile Crosstalk tS tR, tF dG dP HD2 HD3 Settling Time Small-Signal Rise and Fall Time Differential Gain Differential Phase 2nd Harmonic Distortion 3rd Harmonic Distortion CONDITIONS VOUT = 2VP-P (Note 7) VOUT = 4VP-P (Note 7) f = 10MHz, VOUT = 2VP-P f = 100MHz, VOUT = 2VP-P 0.1% of VFINAL, VSTEP = 2V 10% to 90%, VOUT = 200mVP-P (Note 8) (Note 8) f = 10MHz, VOUT = 2VP-P f = 10MHz, VOUT = 2VP-P MIN 270 TYP 400 200 -90 -60 6 550 0.022 0.006 -82 -96 MAX UNITS MHz MHz dB dB ns ps % Deg dBc dBc
ELECTRICAL CHARACTERISTICS
Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: This parameter is guaranteed to meet specified performance through design and characterization. It is not production tested. Note 3: As long as output current and junction temperature are kept below the Absolute Maximum Ratings, no damage to the part will occur. Depending on the supply voltage, a heat sink may be required. Note 4: The LT6554C is guaranteed functional over the operating temperature range of -40C to 85C. Note 5: The LT6554C is guaranteed to meet specified performance from 0C to 70C. The LT6554C is designed, characterized and expected to meet specified performance from -40C and 85C but is not tested or QA sampled at these temperatures. The LT6554I is guaranteed to meet specified performance from -40C to 85C.
Note 6: The two supply voltage settings for power supply rejection are shifted from the typical VS points for ease of testing. The first measurement is taken at V+ = 3V, V- = -1.5V to provide the required 3V headroom for the enable circuitry to function with EN, DGND, AGND and all inputs connected to 0V. The second measurement is taken at V+ = 8V, V- = -4V. Note 7: Large signal bandwidth is calculated from the slew rate: LSBW = SR/( * VP-P) Note 8: Differential gain and phase are measured using a Tektronix TSG120YC/NTSC signal generator and a Tektronix 1780R video measurement set. The resolution of this equipment is better than 0.05% and 0.05. Nine identical amplifier stages were cascaded giving an effective resolution of better than 0.0056% and 0.0056. Note 9: Slew rate is 100% production tested on the G channel. Slew rate of the R and B channels is guaranteed through design and characterization.
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LT6554 TYPICAL PERFOR A CE CHARACTERISTICS
Supply Current per Amplifier vs Temperature
12 10 VS = 5V RL = VIN = 0V 12
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
SUPPLY CURRENT (mA)
VEN = 0V 8 6 4 2 0 -55 -35 -15 VEN = 0.4V
5 25 45 65 85 105 125 TEMPERATURE (C)
6554 G01
Offset Voltage vs Temperature
15.0 12.5 VS = 5V VIN = 0V TYPICAL PART 20
INPUT BIAS CURRENT (A)
OFFSET VOLTAGE (mV)
EN PIN CURRENT (A)
10.0 7.5 5.0 2.5 0 -2.5 -5.0 -55 -35 -15 5 25 45 65 85 105 125 TEMPERATURE (C)
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Output Voltage vs Input Voltage
5 VS = 5V 4 RL = 1k 3 5
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
2 1 0 -1 -2 TA = -55C -3 -4
TA = 25C
3
TA = -55C TA = 25C
OUTPUT VOLTAGE (V)
TA = 125C -5 -4.5 -3.5 -2.5 -1.5 -0.5 0.5 1.5 2.5 3.5 4.5 INPUT VOLTAGE (V)
6554 G07
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Supply Current per Amplifier vs Supply Voltage
V- = -V+ VEN, VDGND, VIN = 0V 10 TA = 25C 8 6 4 2 0 12 10 8 6 4 2 0
Supply Current per Amplifier vs EN Pin Voltage
TA = -55C TA = 25C TA = 125C VS = 5V VDGND = 0V VIN = 0V
0
1
2
3 4 5 6 7 8 9 10 11 12 TOTAL SUPPLY VOLTAGE (V)
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0
0.5
1.0 1.5 2.0 2.5 3.0 EN PIN VOLTAGE (V)
3.5
4.0
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Input Bias Current vs Input Voltage
VS = 5V 0 -20 0 TA = 125C -20 -40 -60 -80
EN Pin Current vs EN Pin Voltage
VS = 5V VDGND = 0V
TA = 125C TA = -55C TA = 25C
TA = 25C TA = -55C
-40
-100 -120
-60 -2.5
-1.5
0.5 1.5 -0.5 INPUT VOLTAGE (V)
2.5
6554 G05
-140 0 1 3 2 EN PIN VOLTAGE (V) 4 5
6554 G06
Output Voltage Swing vs ILOAD (Output High)
VS = 5V VIN = 4V 0
Output Voltage Swing vs ILOAD (Output Low)
VS = 5V VIN = -4V TA = 25C -2 TA = 125C -3 TA = -55C
4
-1
2 TA = 125C 1
-4
0 0 10 20 30 40 50 60 70 80 90 100 SOURCE CURRENT (mA)
6554 G08
-5
0
10 20 30 40 50 60 70 80 90 100 SINK CURRENT (mA)
6554 G09
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LT6554 TYPICAL PERFOR A CE CHARACTERISTICS
Input Noise Spectral Density
1000 INPUT NOISE (nV/Hz OR pA/Hz) VS = 5V TA = 25C INPUT IMPEDANCE (k) 1000
100
en
REJECTION RATIO (dB)
10
in
1 0.001 0.01 0.1 1 FREQUENCY (kHz) 10 100
6554 G10
Frequency Response
3 VS = 5V 2 RL = 1k CL = 1.5pF 1 TA = 25C AMPLITUDE (dB) 0 -1 -2 -3 -4 -5 -6 0.1 1 100 10 FREQUENCY (MHz) 1000
6554 G13
VOUT = 200mVP-P AMPLITUDE (dB)
AMPLITUDE (dB)
VOUT = 2VP-P VOUT = 4VP-P
Frequency Response with Capacitive Loads
12 VS = 5V 10 VOUT = 200mVP-P RL = 1k 8 TA = 25C AMPLITUDE (dB) 6 4 2 0 -2 -4 -6 0.1 1 100 10 FREQUENCY (MHz) 1000
6554 G16
DISTORTION (dBc)
CL = 9pF CL = 6.8pF CL = 3.3pF CL = 1.5pF
OUTPUT IMPEDANCE ()
UW
CL = 12pF
Input Impedance vs Frequency
VS = 5V VIN = 0V TA = 25C 70 60 50 40 30 20 10 0.1 0.01
PSRR vs Frequency
PSRR +PSRR -PSRR VS = 5V TA = 25C
100
10
1
0.1
1 10 FREQUENCY (MHz)
100
1000
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0 0.001
0.01
0.1 1 FREQUENCY (MHz)
10
100
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Gain Flatness vs Frequency
0.5 VS = 5V 0.4 VOUT = 200mVP-P RL = 1k 0.3 C = 1.5pF L 0.2 TA = 25C TYPICAL PART 0.1 0 - 0.1 - 0.2 - 0.3 - 0.4 - 0.5 0.1 1 10 100 FREQUENCY (MHz) 1000
6554 G14
Crosstalk vs Frequency
0 - 20 VS = 5V VOUT = 2VP-P RL = 1k TA = 25C ALLHOSTILE
R-CHANNEL
- 40 - 60 - 80
G-CHANNEL B-CHANNEL
WORST ADJACENT
- 100 - 120
0.1
1
10 100 FREQUENCY (MHz)
1000
6554 G15
Harmonic Distortion vs Frequency
VS = 5V -10 V OUT = 2VP-P -20 RL = 1k T = 25C -30 A -40 -50 -60 -70 -80 -90 -100 -110 -120 0.01 0.1 1 10 FREQUENCY (MHz) 100
6554 G17
Output Impedance vs Frequency
100000 10000 1000 100 10 1 0.1 0.01 DISABLED VEN = 4V VS = 5V RL = 1k TA = 25C
0
HD2 HD3
ENABLED VEN = 0.4V
0.1
1 10 100 FREQUENCY (MHz)
1000
6554 G18
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LT6554 TYPICAL PERFOR A CE CHARACTERISTICS
Maximum Capacitive Load vs Output Series Resistor
35 30 25 0.05 VOUT = 2VP-P VS = 5V RL = 1k TA = 25C 0.15
OUTPUT SERIES RESISTANCE ()
OUTPUT (V)
OUTPUT (V)
20 15 10 5 0 1 10 100 CAPACITIVE LOAD (pF) 1000
6554 G25
AC PEAKING >2dB
Large Signal Transient Response
1.5 VIN = 2VP-P VS = 5V 1.0 RL = 1k TA = 25C 0.5 4 3 2
OUTPUT (V)
0 -0.5 -1.0 -1.5
OUTPUT (V)
0
2
Gain Error Distribution
35 30 VS = 5V VOUT = 2V RL = 1k TA = 25C 40 35
PERCENT OF UNITS (%)
25 20 15 10 5 0 -1.1
PERCENT OF UNITS (%)
-0.1 -0.9 -0.5 -0.3 -0.7 GAIN ERROR-INDIVIDUAL CHANNEL (%)
6554 G23
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4 6
Small Signal Transient Response
VIN = 100mVP-P VS = 5V 0.10 RL = 1k TA = 25C 0.9
Video Amplitude Transient Response
VIN = 700mVP-P 0.8 VS = 5V R = 1k 0.7 L TA = 25C 0.6 0.5 0.4 0.3 0.2 0.1 0
0 -0.05 -0.10 -0.15
0
2
4
6
8 10 12 14 16 18 20 TIME (ns)
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-0.1
0
2
4
6
8 10 12 14 16 18 20 TIME (ns)
6554 G20
Large Signal Transient Response
VIN = 5VP-P VS = 5V RL = 1k TA = 25C
1 0 -1 -2 -3
8 10 12 14 16 18 20 TIME (ns)
6554 G21
-4
0
2
4
6
8 10 12 14 16 18 20 TIME (ns)
6554 G22
Gain Error Matching Distribution
VS = 5V VOUT = 2V RL = 1k TA = 25C
30 25 20 15 10 5
0 -0.10
0.10 0.02 0.06 -0.02 -0.06 GAIN ERROR BETWEEN CHANNELS (%)
6554 G24
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LT6554
PI FU CTIO S
EN (Pin 1): Enable Control Pin. An internal pull-up resistor of 46k defines the pin's impedance and will turn the part off if the pin is unconnected. When the pin is pulled low, the part is enabled. DGND (Pin 2): Digital Ground Reference for Enable Pin. This pin is normally connected to ground. INR (Pin 3): Red Channel Input. This pin has a nominal impedance of 400k and does not have any internal termination resistor. AGND (Pin 4): Analog Ground for Isolation Between Red and Green Channel Inputs. The AGND pins have ESD protection and therefore should not be connected to potentials outside the power supply range. ING (Pin 5): Green Channel Input. This pin has a nominal impedance of 400k and does not have any internal termination resistor. AGND (Pin 6): Analog Ground for Isolation Between Green and Blue Channel Inputs. The AGND pins have ESD protection and therefore should not be connected to potentials outside the power supply range. INB (Pin 7): Blue Channel Input. This pin has a nominal impedance of 400k and does not have any internal termination resistor. V - (Pin 8): Negative Supply Voltage. V - pins are not internally connected to each other, and must all be connected externally. Proper supply bypassing is necessary for best performance. See the Applications Information section. V - (Pin 9): Negative Supply Voltage for Blue Channel Output Stage. V - pins are not internally connected to each other, and must all be connected externally. Proper supply bypassing is necessary for best performance. See the Applications Information section. OUTB (Pin 10): Blue Channel Output. It is the buffered output of the blue channel input. V + (Pin 11): Positive Supply Voltage for Blue and Green Channel Output Stages. V+ pins are not internally connected to each other, and must all be connected externally. Proper supply bypassing is necessary for best performance. See the Applications Information section. OUTG (Pin 12): Green Channel Output. It is the buffered output of the green channel input. V - (Pin 13): Negative Supply Voltage for Green and Red Channel Output Stages. V - pins are not internally connected to each other, and must all be connected externally. Proper supply bypassing is necessary for best performance. See the Applications Information section. OUTR (Pin 14): Red Channel Output. It is the buffered output of the red channel input. V + (Pin 15): Positive Supply Voltage for Red Channel Output Stage. V+ pins are not internally connected to each other, and must all be connected externally. Proper supply bypassing is necessary for best performance. See the Applications Information section. V + (Pin 16): Positive Supply Voltage. V+ pins are not internally connected to each other, and must all be connected externally. Proper supply bypassing is necessary for best performance. See the Applications Information section.
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LT6554
APPLICATIO S I FOR ATIO
Power Supplies The LT6554 is optimized for 5V supplies but can be operated on as little as 2.25V or a single 4.5V supply and as much as 6V or a single 12V supply. Internally, each supply is independent to improve channel isolation. Do not leave any supply pins disconnected! Enable/Shutdown The LT6554 has a TTL compatible shutdown mode controlled by the EN pin and referenced to the DGND pin. If the amplifier will be enabled at all times, the EN pin can be connected directly to DGND. If the enable function is desired, either driving the pin above 2V or allowing the internal 46k pull-up resistor to pull the EN pin to the top rail will disable the amplifier. When disabled, the output will become very high impedance. Supply current into the amplifier in the disabled state will be primarily through V+ and approximately equal to (V+ - VEN)/46k. It is important that the two following constraints on the DGND pin and the EN pin are always followed: V+ - VDGND 3V VEN - VDGND 5.5V Split supplies of 3V to 5.5V will satisfy these requirements with DGND connected to 0V. In single supply applications above 5.5V, an additional resistor may be needed from the EN pin to DGND if the pin is ever allowed to float. For example, on a 12V single supply, a 33k resistor to ground would protect the pin from floating too high while still allowing the internal pull-up resistor to disable the part. On dual 2.25V supplies, connecting the EN and DGND pins to V- is the easiest way of ensuring that V+ - VDGND is more than 3V. The DGND pin should not be pulled above the EN pin since doing so will turn on an ESD protection diode. If the EN pin voltage is forced a diode drop below the DGND pin, current should be limited to 10mA or less. The enable/disable times of the LT6554 are fast when driven with a logic input. Turn on (from 50% EN input to 50% output) typically occurs in less than 50ns. Turn off is slower, but is nonetheless below 300ns.
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Input Considerations The LT6554 input voltage range is from V- + 1V to V+ - 1V and is therefore larger than the output swing. The inputs can be driven beyond the point at which the output clips so long as input currents are limited to below 10mA. Layout and Grounding It is imperative that care is taken in PCB layout in order to utilize the very high speed and very low crosstalk of the LT6554. Separate power and ground planes are highly recommended and trace lengths should be kept as short as possible. If input traces must be run over a distance of several centimeters, they should use a controlled impedance with either series or shunt terminations (nominally 50 or 75) to maintain signal fidelity. Care should be taken to minimize capacitance on the LT6554's output traces by increasing spacing between traces and adjacent metal and by eliminating metal planes in underlying layers. To drive cable or traces longer than several centimeters, using the LT6553 with its fixed gain of +2 in conjunction with series and load termination resistors may provide better results. A plot of LT6554 performance driving a 1k load with various trace lengths is shown in Figure 1. All data is from a 4-layer board with 2oz copper, 18mil of board layer thickness to the ground plane, a trace width of 12mils and spacing to adjacent metal of 18mils. The 0.2cm output trace places the 1k resistor as close to the part as possible, while the other curves show the load resistor consecutively further away. The worst case, 4cm, trace has almost 10pF of parasitic capacitance. In order to counteract any peaking in the frequency response from driving a capacitive load, a series resistance can be inserted in the line at the output of the part to flatten the response. Figure 2 shows the frequency response with the same 4cm trace from Figure 1, now with a 10 series resistor inserted near the output pin of the LT6554. Note that using a 10 series resistor with a 1k load only decreases the output amplitude by 0.1dB or 1% and has a minimal effect on the bandwidth of the system. See the graph labeled "Maximum Capacitive Load vs Output Series Resistor" in the Typical Performance Characteristics section for more information.
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LT6554
APPLICATIO S I FOR ATIO
6 4 AMPLITUDE (dB) 2 2cm TRACE 0 0.2cm TRACE -2 -4 -6 VS = 5V VOUT = 200mVP-P RL = 1k TA = 25C 4cm TRACE
0.1
1
10 100 FREQUENCY (MHz)
1000
6554 F01
Figure 1. Response vs Output Trace Length
6 4 AMPLITUDE (dB) 2 0 -2 -4 -6 4cm TRACE RS, OUT = 10
VS = 5V VOUT = 200mVP-P RL = 1k TA = 25C
4cm TRACE
0.1
1
10 100 FREQUENCY (MHz)
1000
6554 F02
Figure 2. Response vs Series Output Resistance
While the AGND pins on the LT6554 are not connected to the amplifier circuitry, tying them to ground or another "quiet" node significantly increases channel isolation and is always recommended. The AGND pins do have ESD protection and therefore should not be connected to potentials outside the power supply range. Low ESL/ESR bypass capacitors should be placed as close to the positive and negative supply pins as possible. One 4700pF ceramic capacitor is recommended for both V+ and V-. Additional 470pF ceramic capacitors with minimal trace length on each supply pin will further improve AC and transient response as well as channel isolation. For high current drive and large-signal transient applications, additional 1F to 10F tantalums should be added on each
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supply. The smallest value capacitors should be placed closest to the package. To maintain the LT6554's channel isolation, it is beneficial to shield parallel input and output traces using a ground plane or power supply traces. Vias between topside and backside metal are recommended to maintain a low inductance ground, especially between closely spaced signal traces. Single Supply Operation Figure 3 illustrates how to use the LT6554 with a single supply ranging from 4.5V to 12V. Since the output range is comparable to the input range, the DC bias point at the input can be set anywhere between the supplies that will prevent the AC-coupled signal from running into the output range limits. As shown, the DC input level is midsupply. The only additional power dissipation in the single supply configuration is through the resistor bias string at the input and through any load resistance at the output. In many cases, the output can be used to directly drive other single supply devices without additional coupling and without any resistive load. ESD Protection The LT6554 has reverse-biased ESD protection diodes on all pins. If any pins are forced a diode drop above the positive supply or a diode drop below the negative supply, large currents may flow through these diodes. If the current is kept below 10mA, no damage to the device will occur.
4.5V TO 12V 22F VIN 5k IN V+ 1/3 LT6554 V- OUT 5k AGND
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Figure 3. Single Supply Configuration, One Channel Shown
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LT6554
TYPICAL APPLICATIO
RGB Buffer Demo Board
The DC794 Demo Board illustrates optimal routing, bypassing and termination using the LT6554 as an RGB video buffer. The schematic is shown in Figure 4. All inputs and outputs are routed to have a characteristic impedance of 75. The 75 input shunt and output series terminations are connected as close to the part as possible. While the 75 back termination resistors at the outputs of the LT6554 minimize signal reflections in the output traces and isolate the part from any capacitive loading in those traces, they also contribute to gain error if the output is not terminated with high impedance. For example, if the output is terminated with a 1k load, the 75 back termination will cause a 7% gain error. Decreasing the value of the back termination resistors will decrease the signal attenuation but may compromise the AC response. However, connecting the LT6554 outputs to the output traces on the DC794 board without some series resistance is not recommended; 10 to 20 is generally sufficient. A fourth signal trace is provided at the bottom of the DC794 demo board with dimensions identical to the
E1 EN J1 50 BNC 1 EN
5432 JP2 DGND 12 3 AGND FLOAT 5 4 3 2 5 4 3 2 5 4 3 2 BNC x 3 1 J5 1 J6 1 J7 E3 AGND SINGLE 1 DUAL 23 Z = 75 Z = 75
E2 DGND
INR
ING
Z = 75 R4 75 R5 75 R6 75
INB
AGND J3 BANANA JACK 1 J8 BNC
JP3 SUPPLY
CAL
5 4 3 2
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combined input and output of the other channels. This trace can be used for calibrating the effects of electrical delay and impedance mismatching and is not necessary in an end-user application. Jumpers and additional connectors are also included to allow for evaluation of the enable feature and single supply operation. RGB Video Selector/Cable Driver A video multiplexer can be implemented using the EN pins of parallel LT6554s as shown in Figure 5. In this application, the corresponding outputs are connected together and one LT6554 is switched on while the other is switched off. A fast inverter provides a complementary signal to ensure that only one set of R, G and B channels is buffered at any time. Since the output impedance of a disabled LT6554 is very high, adding additional channels will not resistively load an enabled output. However, since the disabled LT6554 has around 6pF of capacitance, it may be desirable to resistively isolate the outputs of each channel to maintain flat frequency response as shown in the graph labeled "Maximum Capacitive Load vs Output Series Resistor" in the Typical Performance Characteristics section.
JP1 CONTROL 12 ENABLE 3 EXT C1 4700pF 1 2 3 4 5 6 7 8 LT6554 EN DGND INR AGND ING AGND INB V- V+ V+ OUTR V- OUTG V
+
V+ V+ C4 J2 10F, 16V BANANA 1210 JACK
C2 470pF
C3 4700pF
16 15 14 13 12 11 10 R1 75 R2 75 R3 75 BNC x3 1 J9 Z = 75 1 J10 1 J11 V- V- 5 4 3 2 5 4 3 2 5 4 3 2
Z = 75
OUTR
OUTG
OUTB
Z = 75
9 V-
OUTB
C5 470pF
C6 1000pF
C7 470pF
C8 4700pF
C9 10F, 16V 1210
J4 BANANA JACK
Z = 75 ALL BNC: CANARE BCJ-BPLH
1 J12 BNC
5 4 3 2
CAL
Figure 4. DC794 Demo Board Schematic
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LT6554
SI PLIFIED SCHE ATIC
V+ BIAS TO OTHER AMPLIFIERS V+
46k 1k EN IN V- 150
DGND V-
6554 SS
PACKAGE DESCRIPTIO
.254 MIN
.0165 .0015
RECOMMENDED SOLDER PAD LAYOUT
.007 - .0098 (0.178 - 0.249)
.016 - .050 (0.406 - 1.270)
NOTE: 1. CONTROLLING DIMENSION: INCHES INCHES 2. DIMENSIONS ARE IN (MILLIMETERS) 3. DRAWING NOT TO SCALE *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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V+ 480 OUT
V-
GN Package 16-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.045 .005
.189 - .196* (4.801 - 4.978) 16 15 14 13 12 11 10 9
.009 (0.229) REF
.150 - .165
.229 - .244 (5.817 - 6.198)
.150 - .157** (3.810 - 3.988)
.0250 TYP
1
23
4
56
7
8
.004 - .0098 (0.102 - 0.249)
.015 .004 x 45 (0.38 0.10)
0 - 8 TYP
.053 - .068 (1.351 - 1.727)
.008 - .012 (0.203 - 0.305)
.0250 (0.635) BSC
GN16 (SSOP) 0502
6554fa
11
LT6554
TYPICAL APPLICATIO
NC7SZ14
R1
G1
B1 75 75 75
SEL
R0
G0
B0 75 75 75
RELATED PARTS
PART NUMBER LT1259/LT1260 LT1395/LT1396/LT1397 LT1398/LT1399 LT1675/LT1675-1 LT1809/LT1810 LT6550/LT6551 LT6553 DESCRIPTION Dual/Triple 130MHz Current Feedback Amplifiers Single/Dual/Quad 400MHz Current Feedback Amplifiers Dual/Triple 300MHz Current Feedback Amplifiers 250MHz, Triple and Single RGB Multiplexer with Current Feedback Amplifiers Single/Dual, 180MHz, Rail-to-Rail Input and Output Amplifiers 3.3V Triple and Quad Video Buffers 650MHz, Gain of 2, Triple Video Amplifier COMMENTS Shutdown, Operates to 15V 800V/s Slew Rate 0.1dB Gain Flatness to 150MHz, Shutdown 100MHz Pixel Switching, -3dB Bandwidth: 250MHz, 1100V/s Slew Rate 350V/s Slew Rate, Shutdown, Low Distortion -90dBc at 5MHz 110MHz Gain of 2 Buffers in MSOP Package Same Pinout as LT6554
12
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 FAX: (408) 434-0507
U
3.3V 1 2 3 4 5 6 7 8 x1 x1 x1 LT6554 16 15 14 13 12 11 10 9 ROUT GOUT 1 2 3 4 5 6 7 8 x1 x1 x1 LT6554 16 15 14 13 12 11 10 9 NOTE: POWER SUPPLY BYPASS CAPACITORS NOT SHOWN FOR CLARITY -3.3V
6554 F05
BOUT
Figure 5. RGB Video Selector and A/D Driver
6554fa LT/TP 0305 1K REV A * PRINTED IN USA
www.linear.com
(c) LINEAR TECHNOLOGY CORPORATION 2004

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